In the destruction of ESD, static electricity can cause devastating damage to I/O ports, which may cause data bit ghosting, product damage, and even electronic equipment “hard failure” or component damage. Therefore, engineers need to consider the ESD problem in the design and master the solution.
We believes that more and more low-power logic chips are used in portable products. Due to the limitation of metal oxide semiconductor (MOS) dielectric breakdown and bipolar reverse junction current, these logic chips are very sensitive to ESD. IC chips that control I/O ports (USB ports, Ethernet ports, etc.) are no exception, because most of them are designed and manufactured on the basis of CMOS technology, which makes IC chips very sensitive to damage caused by ESD. In addition, most I/O ports (especially USB ports) are hot-swappable systems, which are extremely susceptible to ESD effects caused by users or air discharge. It can be seen that ESD Protection Device TVS/ESD Arrays is very necessary in today’s portable and USB applications.
Some engineers questioned the protective effect of adding TVS/ESD Arrays in the T1/E1 interface design. We believes that adding TVS/ESD Arrays to the power line can help solve the ESD problem from the power port, and emphasized that the TVS/ESD Arrays should be connected to the power supply. Vcc and ground to prevent ESD interference from the power supply.
When answering the question about comprehensive consideration of ESD protection raised by engineers, We believe that it should start from three aspects: 1. ESD capacity of the chip; 2. PCB layout design; 3. mechanical design. A good PCB layout design should maximize the grounding area and shorten the PCB traces. Also the TVS/ESD Arrays can effectively solve the ESD problem.
Regarding the common mode interference caused by ESD, we pointed out that common mode chokes or TVS/ESD Arrays can usually be used to solve ESD problems and complete EMI filtering. Common mode chokes are connected in series in the circuit, and TVS/ESD Arrays is connected in parallel in the circuit. In addition to considering using devices to solve ESD problems, we can also follow some basic rules to solve PCB ESD problems:
1. Use multi-layer PCBs as much as possible. Compared with double-sided PCBs, the ground plane and power plane and the tightly arranged signal line-ground spacing can reduce common impedance and inductive coupling, making it double-sided 1/10 to 1/100 of PCB.
2. Try to put each signal layer close to a power layer or ground layer. For high-density PCBs with components on the top and bottom surfaces, short connection lines, and many fills, you can consider using inner layer lines. Most of the signal lines, power and ground planes are on the inner layer, which is similar to a Faraday box with shielding function.
3. For double-sided PCBs, tightly interwoven power and ground grids should be used. The usual solution principle is to pass the cycle of testing-solving the problem-retesting, each cycle may affect at least one PCB design. In the PCB design process, the vast majority of design modifications can be limited to the addition or reduction of components through prediction.
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